Unlike its PCI predecessor, which used a shared bus, PCI Express is a switched architecture of up to 32 independent, serial lanes (x1-x32) that transfer in parallel. Each lane is full duplex (see ...
If the implementation will be a PCI Express endpoint – like most embedded applications – FPGAs will most-likely be the ideal choice. Today's high-end 90nm FPGAs such as the Virtex-4 family offer ...